The gate lengths in a state-of-the-art Pentium IV processor are now at 65nm and will shrink to below 20 nm in the next 10 years. At these nanoscale lengths further downscaling of critical device dimensions encounters several severe physical limitations, such as the onset of quantum effects. But also technological limitations become more and more important.
Here we report on a recently discovered phenomenon that is expected to be of significant relevance for the processing of future Si-based heterodevices with nanoscale dimensions. It is an intrinsic homoepitaxial growth instability on the Si(001) surface [PRL 83, 995 (1999)], which leads to the kinetic formation of surface undulations with amplitudes of several nm and quasi-periods of several 100 nm. Although such morphological instabilities may ultimately be exploited as self-organization phenomena, they are certainly detrimental to the properties of Si/SiGe heterointerfaces, which will become important for future high-speed devices.
We report on a systematic set of experiments to determine the dependence of the step-bunching growth instability on the deposition and wafer-miscut conditions. We found a very pronounced temperature dependence, with the maximum of the ripple formation overlapping the range of growth parameters frequently employed during standard molecular beam epitaxy of Si on Si(001). We also determined the critical exponents for the ripple amplitude and period as a function of the deposited layer thickness.
To identify the dominating mechanism, we performed kinetic Monte Carlo simulations utilizing a simplified model for the (2x1)/(1x2) reconstructed Si(001) surface. It was found that the diffusion anisotropy of this reconstructed surface in connection with the difference of the binding energies at SA and SB steps is the main mechanism driving the kinetic growth instability. The complex adsorption/desorption kinetics at these two principal types of step edges behaves like an effective inverse Ehrlich-Schwoebel barrier, which causes the step-bunching instability of the Si(001) surface [Surf. Sci. 520, 193 (2002)].
Kinetic step bunching on Si(001) has long been associated with the strain induced by a heteroepitaxial SiGe epilayer. By performing a wide variety of experiments with Si homo- and SiGe heteroepitaxial layers and superlattices, we can rule out that strain plays any relevant role in the formation of the step bunches. On the contrary, SiGe layers tend to reduce the kinetic step bunching effect, while close to thermal equilibrium they disintegrate into Stranski-Krastanov islands on a thin wetting layer[Surf. Sci. 532 - 535, 721 - 726 (2003)]. The formation of (one-dimensional) step bunches is not an energetic favorable mechanism near thermal equilibrium and is thus of purely kinetic origin [Phys. Rev. B 64, 041301(R) (2001)]. This finding allows for a complete suppression of step bunching on Si(001) by choosing growth parameters close to thermal equilibrium. This is an important prerequisite for SiGe heterostructures with a low amount of interface roughness scattering.