Silicon carbide (SiC) is categorized as hard-to-process material. Usually, standard wafers manufacturing like chemical-mechanical polishing (CMP) with SiO₂ or diamond abrasive is used [1]. Such processing does not guarantee perfect surface which is expected to grown epitaxial films on them or to use it as a substrate. Because of physical hardness and chemical inertness is difficult to obtain atomic level surface flatness without subsurface damage [2, 3].

The efforts of finding extra process which could be applied after standard polishing of SiC wafers are demonstrated.

Two methods of improvement of the quality of the polished surface have been presented:

1. chemical oxidation using Fenton process,

2. thermal annealing with assorted conditions.

According to Fenton reaction, (OH^•) radicals which is are an oxidizing agent, are generated during the decomposition of a hydrogen peroxide (H₂O₂) solution in the presence of ion Fe²⁺ as a catalyst.

Fe²⁺ + H₂O₂ → Fe³⁺ + OH^• + OH^-

 In the second step, SiC surface is oxidizing as follows:

 SiC  + 4OH^•  +  O₂  =  SiO₂  + 2H₂O  +  CO₂^↑

Thin film of SiO₂ is dissolved in HF solution or removed by polishing. As a result, the quality of the surface roughness parameters was improved (R_a ≈ 0.39 nm).

The thermal annealing in vacuum, T = 900 ºC caused very smooth surface with R_a ≤0.10 nm and significantly reduced subsurface damaged layers [4].

            To check the effectiveness of this improvement, two silicon carbide wafers were prepared as substrates for new grown process of SiC crystals: one of them following standard technique and another one using chemical oxidation. The surface smoothness before and after processing was measured using atomic force microscope (AFM) and optical microscope.

To compare crystallographic quality of new SiC crystals the X-ray methods were used.

Acknowledgements: This work was supported by the SICMAT Project co-financed by the European Regional Development Fund under the Operational Programme Innovative Economy (Contract No. UDA-POIG.01.03.01-14-155/09).

References:

[1] H. Aida, T. Doi, H. Takeda, H. Kakatura, S.-W. Kim, K. Koyama, T. Yamazaki,
M. Uneda, Current Applied Physics 12 (2012) S41-S46.

[2] A. N. Hattori, T. Okamoto, S. Sadakuni, J. Murata, K. Arima, Y. Sano, K. Hattori,
H. Daimon, K. Endo, K. Yamauchi, Surface Science 605 (2011) 597-605.

[3] L. Zhou, V. Audurier, P. Piruoz, J.A. Powell, Journal of Electrochemical Society 144 (6) (1997) L 161-163.

[4] C. Richtarch: Method of preparing a surface of a semiconductor wafer to make it epiready, United States Patent: US 7,060, 620, B2, 2006.

• Legal notice:
  

  Copyright (c) Pielaszek Research, all rights reserved.
  The above materials, including auxiliary resources, are subject to Publisher's copyright and the Author(s) intellectual rights. Without limiting Author(s) rights under respective Copyright Transfer Agreement, no part of the above documents may be reproduced without the express written permission of Pielaszek Research, the Publisher. Express permission from the Author(s) is required to use the above materials for academic purposes, such as lectures or scientific presentations.
  In every case, proper references including Author(s) name(s) and URL of this webpage: https://science24.com/paper/30143 must be provided.

1. The influence of pressure on growth of 3C-SiC heteroepitaxial layers on silicon substrates
2. XPS characterization of YAlO₃:Co single crystals
3. Initial Stage of SiC Crystal Growth by PVT Method
4. Preparation of the ZnO substrate surface
5. XPS investigations of NdGaO3 wafers